A temperature-insensitive self-recharging circuitry used in DRAMs.

A temperature-insensitive self-recharging circuitry used in DRAMs.

This paper presents a practical self-recharging circuitry for DRAMs. The proposed self-recharging circuitry not only reduces the standby power by monitoring the voltage drop caused by the data loss of a memory cell but also adjusts the recharging period of the memory cell that results from leakage c...

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Bibliographic Details
Published in:IEEE Transactions on VLSI systems 13, 3 (2005).
Main Author: Chua-Chin Wang
Format: Article
Language:English
Subjects:
0.35 micron.
1 kbit.
DRAM.
TSMC 1P4M CMOS process.
Leakage currents.
Memory cell.
Power reduction.
Temperature insensitive self recharging circuit.