Efficient shield insertion for inductive noise reduction in nanometer technologies.

Efficient shield insertion for inductive noise reduction in nanometer technologies.

With high clock frequencies, faster transistor rise/fall time, wider wires, and the use of Cu material interconnects, interconnect inductive noise is becoming an important design metric in digital circuits. An efficient technique to reduce the inductive noise of on-chip interconnects is to insert sh...

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Bibliographic Details
Published in:IEEE Transactions on VLSI systems 13, 3 (2005).
Main Author: Elgamel, M.A
Format: Article
Language:English
Subjects:
Cu material interconnects.
Digital circuits.
Electronic design automation.
Inductive noise reduction.
Integrated circuit design.
Interconnect inductive noise.
Multiple coupled nets.
Nanometer technology.
Noise constraints.
On-chip interconnects.
Shield insertion.
Shielding.
Signal wires.