Accurate and efficient simulation of synchronous digital switching noise in systems on a chip.
A new method is presented to compress switching information in large synchronous digital circuits. This is combined with an efficient generation of digital cell library noise signatures and results in an accurate estimation of the switching noise in digital circuits. It provides a practical approach...
| 出版年: | IEEE Transactions on VLSI systems 13, 3 (2005). |
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| 第一著者: | |
| フォーマット: | 論文 |
| 言語: | English |
| 主題: |