Cita APA (7th ed.)

Tiwari, M. Memory sub-banking scheme for high throughput MAP-based SISO decoders. IEEE Transactions on VLSI systems.

Cita Chicago (17th ed.)

Tiwari, M. "Memory Sub-banking Scheme for High Throughput MAP-based SISO Decoders." IEEE Transactions on VLSI Systems .

Cita MLA (9th ed.)

Tiwari, M. "Memory Sub-banking Scheme for High Throughput MAP-based SISO Decoders." IEEE Transactions on VLSI Systems, .

Atenció: Aquestes cites poden no estar 100% correctes.