Efficient asynchronous bundled-data pipelines for DCT matrix-vector multiplication.
This paper demonstrates the design of efficient asynchronous bundled-data pipelines for the matrix-vector multiplication core of discrete cosine transforms (DCTs). The architecture is optimized for both zero and small-valued data, typical in DCT applications, yielding both high average performance a...
| Udgivet i: | IEEE Transactions on VLSI systems 13, 4 (2005). |
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| Format: | Article |
| Sprog: | English |
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