APA(7版)引用形式

Olivieri, M. A novel yield optimization technique for digital CMOS circuits design by means of process parameters run-time estimation and body bias active control. IEEE Transactions on VLSI systems.

Chicagoスタイル(17版)引用形式

Olivieri, M. "A Novel Yield Optimization Technique for Digital CMOS Circuits Design by Means of Process Parameters Run-time Estimation and Body Bias Active Control." IEEE Transactions on VLSI Systems .

MLA(9版)引用形式

Olivieri, M. "A Novel Yield Optimization Technique for Digital CMOS Circuits Design by Means of Process Parameters Run-time Estimation and Body Bias Active Control." IEEE Transactions on VLSI Systems, .

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