Cita APA (7th ed.)

Nedovic, N. Dual-edge triggered storage elements and clocking strategy for low-power systems. IEEE Transactions on VLSI systems.

Cita Chicago (17th ed.)

Nedovic, N. "Dual-edge Triggered Storage Elements and Clocking Strategy for Low-power Systems." IEEE Transactions on VLSI Systems .

Cita MLA (9th ed.)

Nedovic, N. "Dual-edge Triggered Storage Elements and Clocking Strategy for Low-power Systems." IEEE Transactions on VLSI Systems, .