APA (7 ম সংস্করণ) উদ্ধৃতি

Nedovic, N. Dual-edge triggered storage elements and clocking strategy for low-power systems. IEEE Transactions on VLSI systems.

শিকাগো স্টাইল (17 তম সংস্করণ) উদ্ধৃতি

Nedovic, N. "Dual-edge Triggered Storage Elements and Clocking Strategy for Low-power Systems." IEEE Transactions on VLSI Systems .

M.L.A (9 ম সংস্করণ) উদ্ধৃতি

Nedovic, N. "Dual-edge Triggered Storage Elements and Clocking Strategy for Low-power Systems." IEEE Transactions on VLSI Systems, .