Nedovic, N. Dual-edge triggered storage elements and clocking strategy for low-power systems. IEEE Transactions on VLSI systems.
Chicago Style (17th ed.) CitationNedovic, N. "Dual-edge Triggered Storage Elements and Clocking Strategy for Low-power Systems." IEEE Transactions on VLSI Systems .
MLA (9th ed.) CitationNedovic, N. "Dual-edge Triggered Storage Elements and Clocking Strategy for Low-power Systems." IEEE Transactions on VLSI Systems, .
Warning: These citations may not always be 100% accurate.