Thepayasuwan, N. Layout conscious approach and bus architecture synthesis for hardware. IEEE Transactions on VLSI systems.
Цитирование в стиле Чикаго (17-е изд.)Thepayasuwan, N. "Layout Conscious Approach and Bus Architecture Synthesis for Hardware." IEEE Transactions on VLSI Systems .
Цитирование MLA (9-е изд.)Thepayasuwan, N. "Layout Conscious Approach and Bus Architecture Synthesis for Hardware." IEEE Transactions on VLSI Systems, .
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