Memory binding for performance optimization of control-flow intensive behavioral descriptions.

Memory binding for performance optimization of control-flow intensive behavioral descriptions.

This paper presents a memory binding algorithm for behaviors, used in application-specific integrated circuits (ASICs), that are characterized by the presence of conditionals and deeply nested loops that access memory extensively through arrays. Unlike previous works, this algorithm examines the eff...

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Foilsithe in:IEEE Transactions on VLSI systems 13, 5 (2005).
Príomhchruthaitheoir: Khouri, K.S
Formáid: Alt
Teanga:English
Ábhair:
Application-specific integrated circuits.
Behavioral synthesis.
Branch probabilities.
Control-flow intensive behavioral descriptions.
Custom-designed arrays.
General-purpose microprocessors.
High-level synthesis.
Memory allocation constraints.
Memory binding.
Memory optimization.
Nested loops.
Parallel computing.
Parallel memory.
Performance estimation.
Performance optimization.
Schedule performance.
System-on-a-chip synthesis.