A built-in self-repair design for RAMs with 2-D redundancy.

A built-in self-repair design for RAMs with 2-D redundancy.

This brief presents a built-in self-repair (BISR) scheme for semiconductor memories with two-dimensional (2-D) redundancy structures, i.e., spare rows and spare columns. The BISR design is composed of a built-in self-test module and a built-in redundancy analysis (BIRA) module. The BIRA module execu...

詳細記述

書誌詳細
出版年:IEEE Transactions on VLSI systems 13, 6 (2005).
第一著者: Jin-Fu Li
フォーマット: 論文
言語:English
主題:
2D redundancy.
RAM.
Built-in redundancy analysis.
Built-in self-repair design.
Built-in self-test.
Embedded memories.
Random access memory.
Semiconductor memories.