Nine-coded compression technique for testing embedded cores in SoCs. - Tehranipoor, M.
This paper presents a new test-data compression technique that uses exactly nine codewords. Our technique aims at precomputed data of intellectual property cores in system-on-chips and does not require any structural information of cores. The technique is flexible in utilizing both fixed- and variable-length blocks. In spite of its simplicity, it provides significant reduction in test-data volume and test-application time. The decompression logic is very small and can be implemented fully independent of the precomputed test-data set. Our technique is flexible and can be efficiently adopted for single- or multiple-scan chain designs. Experimental results for ISCAS'89 benchmarks illustrate the flexibility and efficiency of the proposed technique.
Keywords: Huffman codes; Capacitor switching; Decompression logic; Digital system testing; Embedded cores testing; Fixed-length blocks; Integrated circuit testing; Intellectual property cores; Multiple-scan chain design; Nine-coded compression; Power demand; Run length codes; Single-scan chain design; Structural core information; System-on-chip.; Test-application time; Test-data compression; Test-data volume; Variable-length blocks