00000cab a22000003a 4500 UP-99796217609611169 Buklod 20231007234431.0 m |o d | ta 110111s xx d | ||r ||||| || DENGII eng Sridhara, S.R. Coding for system-on-chip networks a unified framework. pp. 655-667 Global buses in deep-submicron (DSM) system-on-chip designs consume significant amounts of power, have large propagation delays, and are susceptible to errors due to DSM noise. Coding schemes exist that tackle these problems individually. In this paper, we present a coding framework derived from a communication-theoretic view of a DSM bus to jointly address power, delay, and reliability. In this framework, the data is first passed through a nonlinear source coder that reduces self and coupling transition activity and imposes a constraint on the peak coupling transitions on the bus. Next, a linear error control coder adds redundancy to enable error detection and correction. The framework is employed to efficiently combine existing codes and to derive novel codes that span a wide range of tradeoffs between bus delay, codec latency, power, area, and reliability. Using simulation results in 0.13-μm CMOS technology, we show that coding is a better alternative to repeater insertion for delay reduction as it reduces power dissipation at the same time. For a 10-mm 4-bit bus, we show that a bus employing the proposed codes achieves up to 2.17× speed-up and 33% energy savings over a bus employing Hamming code. For a 10-mm 32-bit bus, we show that 1.7× speed-up and 27% reduction in energy are achievable over an uncoded bus by employing low-swing signaling without any loss in reliability. 0.13 micron. 10 mm. 4 bit. CMOS technology. DSM noise. Hamming code. Bus coding. Bus delay. Codec latency. Coding schemes. Coupling transition activity. Crosstalk avoidance. Delay reduction. Energy saving. Error correction. Error detection. Global buses. Interconnection networks. Linear error control. Low-power design. Low-swing signaling. Nonlinear source coder. On-chip buses. Peak coupling transitions. Power dissipation. Propagation delays. Repeater insertion. Self transition activity. System-on-chip designs. IEEE Transactions on VLSI systems 13, 6 (2005). FO Article