Coding for system-on-chip networks a unified framework.

Global buses in deep-submicron (DSM) system-on-chip designs consume significant amounts of power, have large propagation delays, and are susceptible to errors due to DSM noise. Coding schemes exist that tackle these problems individually. In this paper, we present a coding framework derived from a c...

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Bibliographic Details
Published in:	IEEE Transactions on VLSI systems 13, 6 (2005).
Main Author:	Sridhara, S.R
Format:	Article
Language:	English
Subjects:	0.13 micron. 10 mm. 4 bit. CMOS technology. DSM noise. Hamming code. Bus coding. Bus delay. Codec latency. Coding schemes. Coupling transition activity. Crosstalk avoidance. Delay reduction. Energy saving. Error correction. Error detection. Global buses. Interconnection networks. Linear error control. Low-power design. Low-swing signaling. Nonlinear source coder. On-chip buses. Peak coupling transitions. Power dissipation. Propagation delays. Repeater insertion. Self transition activity. System-on-chip designs.