APA (7th ed.) Citation

Chattopadhyay, A. GALDS: A complete framework for designing multiclock ASICs and SoCs. IEEE Transactions on VLSI systems.

Chicago Style (17th ed.) Citation

Chattopadhyay, A. "GALDS: A Complete Framework for Designing Multiclock ASICs and SoCs." IEEE Transactions on VLSI Systems .

MLA (9th ed.) Citation

Chattopadhyay, A. "GALDS: A Complete Framework for Designing Multiclock ASICs and SoCs." IEEE Transactions on VLSI Systems, .

Warning: These citations may not always be 100% accurate.