Chattopadhyay, A. GALDS: A complete framework for designing multiclock ASICs and SoCs. IEEE Transactions on VLSI systems.
Citazione stile Chigago Style (17a edizione)Chattopadhyay, A. "GALDS: A Complete Framework for Designing Multiclock ASICs and SoCs." IEEE Transactions on VLSI Systems .
Citatione MLA (9a ed.)Chattopadhyay, A. "GALDS: A Complete Framework for Designing Multiclock ASICs and SoCs." IEEE Transactions on VLSI Systems, .
Attenzione: Queste citazioni potrebbero non essere precise al 100%.