Zhang, X. High-Speed Architectures for Parallel Long BCH Encoders. IEEE Transactions on VLSI systems.
Chicago Style (17th ed.) CitationZhang, X. "High-Speed Architectures for Parallel Long BCH Encoders." IEEE Transactions on VLSI Systems .
MLA (9th ed.) CitationZhang, X. "High-Speed Architectures for Parallel Long BCH Encoders." IEEE Transactions on VLSI Systems, .
Warning: These citations may not always be 100% accurate.