Fault Tolerance of Switch Blocks and Switch Block Arrays in FPGA.

A new application-independent approach for evaluating the fault tolerance of field-programmable gate-array (FPGA) interconnect structures is presented. Signal routing in the presence of faulty resources at switch block and FPGA levels is analyzed; this problem is directly related to the fault tolera...

Täydet tiedot

Bibliografiset tiedot
Julkaisussa:IEEE Transactions on VLSI systems 13, 7 (2005).
Päätekijä: Huang, J.
Aineistotyyppi: Artikkeli
Kieli:English
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