Level-shifter free design of low power dual supply voltage CMOS circuits using dual threshold voltages.

Level-shifter free design of low power dual supply voltage CMOS circuits using dual threshold voltages.

Usage of dual supply voltages in a digital circuit is an effective way of reducing the dynamic power consumption due to the quadratic relation of supply voltage to dynamic power consumption. But the need for level shifters when a low voltage gate drives a high voltage gate has been a limiting factor...

Cur síos iomlán

Sonraí bibleagrafaíochta
Foilsithe in:IEEE Transactions on VLSI systems 13, 9 (2005).
Príomhchruthaitheoir: Diril, A.U
Formáid: Alt
Teanga:English
Ábhair:
180 nm.
70 mm.
CMOS gates.
CMOS logic circuits.
Digital circuit design.
Dual supply voltages.
Dual threshold voltages.
High voltage gates.
Integrated circuit design.
Level-shifter free design.
Logic design.
Logic gates.
Low power CMOS circuits.
Low voltage gates.
Low-power electronics.
Nanoelectronics.
Power supply circuits.
Voltage level conversion.