Equivalent circuit model of on-wafer CMOS interconnects for RFICs.

This paper investigates the properties of the on-wafer interconnects built in a 0.18-μm CMOS technology for RF applications. A scalable equivalent circuit model is developed. The model parameters are extracted directly from the on-wafer measurements and formulated into empirical expressions. The exp...

Täydet tiedot

Bibliografiset tiedot
Julkaisussa:IEEE Transactions on VLSI systems 13, 9 (2005).
Päätekijä: Xiaomeng Shi
Aineistotyyppi: Artikkeli
Kieli:English
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