Equivalent circuit model of on-wafer CMOS interconnects for RFICs.
This paper investigates the properties of the on-wafer interconnects built in a 0.18-μm CMOS technology for RF applications. A scalable equivalent circuit model is developed. The model parameters are extracted directly from the on-wafer measurements and formulated into empirical expressions. The exp...
| Published in: | IEEE Transactions on VLSI systems 13, 9 (2005). |
|---|---|
| Main Author: | |
| Format: | Article |
| Language: | English |
| Subjects: |