APA (7th ed.) Citation

Kandemir, M. Compiler-guided leakage optimization for banked scratch-pad memories. IEEE Transactions on VLSI systems.

Chicago Style (17th ed.) Citation

Kandemir, M. "Compiler-guided Leakage Optimization for Banked Scratch-pad Memories." IEEE Transactions on VLSI Systems .

MLA (9th ed.) Citation

Kandemir, M. "Compiler-guided Leakage Optimization for Banked Scratch-pad Memories." IEEE Transactions on VLSI Systems, .

Warning: These citations may not always be 100% accurate.