Modular and rapid testing of SOCs with unwrapped logic blocks.

Modular and rapid testing of SOCs with unwrapped logic blocks.

Extensive research has been carried out for test planning of core-based system-on-a-chip devices. Most of the prior work assumes that all of the embedded cores are wrapped for test purpose. However, some designs may contain user-defined logic or cores that cannot be wrapped due to area constraints o...

Täydet tiedot

Bibliografiset tiedot
Julkaisussa:IEEE Transactions on VLSI systems 13, 11 (2005).
Päätekijä: Qiang Xu
Aineistotyyppi: Artikkeli
Kieli:English
Aiheet:
TestRail architecture.
Concurrent testing.
Embedded core test.
Light-wrapped cores.
System-on-chip testing.
Test control mechanism.
Test scheduling algorithm.
Unwrapped logic blocks.
User-defined logic.