Kaul, H. Design and analysis of spatial encoding circuits for peak power reduction in on-chip buses. IEEE Transactions on VLSI systems.
Chicago Style (17th ed.) CitationKaul, H. "Design and Analysis of Spatial Encoding Circuits for Peak Power Reduction in On-chip Buses." IEEE Transactions on VLSI Systems .
MLA (9th ed.) CitationKaul, H. "Design and Analysis of Spatial Encoding Circuits for Peak Power Reduction in On-chip Buses." IEEE Transactions on VLSI Systems, .
Warning: These citations may not always be 100% accurate.