APA aipamena

Efthymiou, A. Test pattern generation and partial-scan methodology for an asynchronous SoC interconnect. IEEE Transactions on VLSI systems.

Chicago Style aipamena

Efthymiou, A. "Test Pattern Generation and Partial-scan Methodology for an Asynchronous SoC Interconnect." IEEE Transactions on VLSI Systems .

MLA aipamena

Efthymiou, A. "Test Pattern Generation and Partial-scan Methodology for an Asynchronous SoC Interconnect." IEEE Transactions on VLSI Systems, .