Scheduling semiconductor wafer fabrication by using ordinal optimization-based simulation. - Bo-Wei Hsieh
Computational efficiency is one of the major challenges of applying simulation to short-term operation scheduling of semiconductor wafer fabrication factories (fabs), which are characterized by re-entrant process flows, stringent production control requirements and fast changing technology and business environments. The paper explores the application of the ordinal optimization (OO)-based simulation technique to efficiently selecting good rules for scheduling wafer fabrications. An efficient simulation tool, which makes use of OO and optimal computing budget allocation techniques, is developed. Experiments with the OO-based simulation tool are conducted for static selection of good rules under different factors such as initial state, performance index and time horizon. Results indicate that one to two orders of computation time reduction over traditional simulations can be achieved and that what rules are good varies with factors of initial state, performance index and time horizon. These results motivate our further investigation about applications to dynamic selection of dispatching rules upon the occurrence of two significant uncertain events: holding of significant amount of wafers-in-process due to engineering causes and major machine failures. Results demonstrate the value of dynamic rule selection for uncertainty handling, the insightful selection of good rules and the needs for future research
Keywords: Dispatching rules; Dynamic rule selection; Machine failures; Optimal computing budget allocation techniques; Ordinal optimization-based simulation; Performance index; Production control requirements; Re-entrant process flows; Semiconductor wafer fabrication; Semiconductor wafer fabs; Short-term operation scheduling; Time horizon; Uncertainty handling; Wafers-in-process.