00000cab a22000003a 4500 UP-99796217609517107 Buklod 20231007234451.0 m |o d | ta 101029s xx d | ||r ||||| || DENGII eng Komuro, T. A digital vision chip specialized for high-speed target tracking. pp. 191-199 This paper describes a new vision chip architecture for high-speed target tracking. The processing speed and the number of pixels are improved by hardware implementation of a special algorithm which utilizes a property of high-speed vision and introduction of bit-serial and cumulative summation circuits. As a result, 18 objects in a 128 × 128 image can be tracked in 1 ms. Based on the architecture, a prototype chip has been developed; 64 × 64 pixels are integrated in 7 mm square chip and the power consumption for obtaining the centroid of an object per every 1 ms is 112 mW. Some experiments are performed on the evaluation board which is developed for evaluation under the condition of actual operation. High-speed target tracking including multitarget tracking with collision and separation has successfully been achieved. 1 ms. 112 mW. 4096 pixel. 64 pixel. Centroid. Cumulative summation circuits. Digital vision chip. Hardware implementation. High-speed target tracking. Multitarget tracking. Power consumption. Processing speed. IEEE Transactions on electron devices 50, 1 (2003). FO UPD DENG-II Article