Afzalian, A. Modeling of the bulk versus SOI CMOS performances for the optimal design of APS circuits in low-power low-voltage applications. IEEE Transactions on electron devices.
Chicago Style (17th ed.) CitationAfzalian, A. "Modeling of the Bulk Versus SOI CMOS Performances for the Optimal Design of APS Circuits in Low-power Low-voltage Applications." IEEE Transactions on Electron Devices .
MLA (9th ed.) CitationAfzalian, A. "Modeling of the Bulk Versus SOI CMOS Performances for the Optimal Design of APS Circuits in Low-power Low-voltage Applications." IEEE Transactions on Electron Devices, .
Warning: These citations may not always be 100% accurate.