System-on-a-chip test-data compression and decompression architectures based on Golomb codes.

System-on-a-chip test-data compression and decompression architectures based on Golomb codes.

We present a new test-data compression method and decompression architecture based on variable-to-variable-length Golomb codes. The proposed method is especially suitable for encoding precomputed test sets for embedded cores in a system-on-a-chip (SoC). The major advantages of Golomb coding of test...

詳細記述

書誌詳細
出版年:IEEE Transactions on computer-aided design of integrated circuits and systems 20, 3 (2001).
第一著者: Chandra, A.
フォーマット: 論文
言語:English
主題:
Automatic test equipment.
Data compression.
Data decompression.
Embedded core.
Input-output channel.
Interleaving architecture.
System-on-a-chip.
Variable-to-variable-length Golomb code.