Table look-up model of thin-film transistors for circuit simulation using spline interpolation with transformation by y x+log(x).
A table look-up model of thin-film transistors has been developed for circuit simulation. This model utilizes three schemes. First, the spline interpolation with transformation by y = x+log(x) achieves precision for both on-current and off-current simultaneously. Second, the square polynomial supple...
| Cyhoeddwyd yn: | IEEE Transactions on computer-aided design of integrated circuits and systems 21, 9 (2002). |
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| Prif Awdur: | |
| Fformat: | Erthygl |
| Iaith: | English |
| Pynciau: |