APA引文

Kimura, M. Table look-up model of thin-film transistors for circuit simulation using spline interpolation with transformation by y: X+log(x). IEEE Transactions on computer-aided design of integrated circuits and systems.

Chicago Style (17th ed.) Citation

Kimura, M. "Table Look-up Model of Thin-film Transistors for Circuit Simulation Using Spline Interpolation with Transformation by Y: X+log(x)." IEEE Transactions on Computer-aided Design of Integrated Circuits and Systems .

MLA引文

Kimura, M. "Table Look-up Model of Thin-film Transistors for Circuit Simulation Using Spline Interpolation with Transformation by Y: X+log(x)." IEEE Transactions on Computer-aided Design of Integrated Circuits and Systems, .