System-on-a-chip test scheduling with precedence relationships, preemption, and power constraints.

System-on-a-chip test scheduling with precedence relationships, preemption, and power constraints.

Test scheduling is an important problem in system-on-a-chip (SOC) test automation. Efficient test schedules minimize the overall system test application time, avoid test resource conflicts, and limit power dissipation during test mode. In this paper, we present an integrated approach to several test...

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書目詳細資料
發表在:IEEE Transactions on computer-aided design of integrated circuits and systems 21, 9 (2002).
主要作者: Iyengar, V.
格式: Article
語言:English
主題:
SOCs.
Desirable orderings.
Embedded core testing.
Heuristic algorithm.
Polynomial time.
Power constraints.
Power dissipation.
Precedence relationships.
Preemption.
System-on-a-chip test automation.
Test resource conflicts.
Test schedules.