Test vector generation for charge sharing failures in dynamic logic.

Test vector generation for charge sharing failures in dynamic logic.

Dynamic logic is increasingly becoming a logic type of choice for designs requiring high speed and low area. Charge sharing is one of many problems that may cause failure in dynamic logic circuits due to their low noise immunity. The authors address the charge-sharing noise issue. Specifically, they...

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Bibliographic Details
Published in:IEEE Transactions on computer-aided design of integrated circuits and systems 21, 12 (2002).
Main Author: Heragu, K.
Format: Article
Language:English
Subjects:
CMOS dynamic logic gate.
Hspice simulations.
Accurate tractable model.
Charge sharing failures.
Charge-sharing noise issue.
Domino gates.
Dynamic logic.
Dynamic logic design.
Generalized ATPG tool.
Low noise immunity.
Test vector generation.