Design rewiring using ATPG.

Design rewiring using ATPG.

Logic optimization is the step of the very large scale integration (VLSI) design cycle where the designer performs modifications on a design to satisfy different constraints such as area, power, or delay. Recently, automated test pattern generation (ATPG)-based design rewiring techniques for technol...

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Xuất bản năm:IEEE Transactions on computer-aided design of integrated circuits and systems 21, 12 (2002).
Tác giả chính: Veneris, A.
Định dạng: Bài viết
Ngôn ngữ:English
Những chủ đề:
ATPG.
VLSI design.
Complexity analysis.
Design rewiring.
Diagnosis algorithm.
Logic optimization.
Multiple fault redundancy checking.