Ata uhi

Design rewiring using ATPG.

Logic optimization is the step of the very large scale integration (VLSI) design cycle where the designer performs modifications on a design to satisfy different constraints such as area, power, or delay. Recently, automated test pattern generation (ATPG)-based design rewiring techniques for technol...

Whakaahuatanga katoa

Ngā taipitopito rārangi puna kōrero
I whakaputaina i:IEEE Transactions on computer-aided design of integrated circuits and systems 21, 12 (2002).
Kaituhi matua: Veneris, A.
Hōputu: Tuhinga
Reo:Ingarihi
Ngā marau:
ATPG.
VLSI design.
Complexity analysis.
Design rewiring.
Diagnosis algorithm.
Logic optimization.
Multiple fault redundancy checking.