A framework for testing special-purpose memories. - Sidorowicz, P.R.
Current memory testing methods rely on fault models that are inadequate to accurately represent potential defects that occur in modern, often specialized, memories. To remedy this, the authors present a formal framework for modeling and testing special-purpose memories. Their approach uses three models: the transistor circuit, the event-sequence model, and finite-state machines. The methodology is explained using the example of a content-addressable memory (CAM). The fault model they describe comprises input stuck-at, transistor, and bridging faults. The authors show that functional tests can reliably detect all input stuck-at faults, most transistor faults (including all stuck-open faults), and about 50% of bridging faults. The remaining faults are detectable by parametric tests. A test of length 7n+2l+9 that detects all the reliably testable faults in an n-word by l-bit CAM is presented. A CAM test by Giles & Hunter is evaluated with respect to the input stuck-at faults. It is shown that this test fails to detect certain faults; it can be modified to achieve full coverage at the cost of increased length.
Keywords: Bridging fault; Content-addressable memory; Event-sequence model; Fault model; Finite-state machine; Parametric test; Special-purpose memory testing; Stuck-at fault; Stuck-open fault; Transistor circuit; Transistor fault