Cita APA (7th ed.)

Chun-Yao Wang. Automatic interconnection rectification for SoC design verification based on the port order fault model. IEEE Transactions on computer-aided design of integrated circuits and systems.

Cita Chicago (17th ed.)

Chun-Yao Wang. "Automatic Interconnection Rectification for SoC Design Verification Based on the Port Order Fault Model." IEEE Transactions on Computer-aided Design of Integrated Circuits and Systems .

Cita MLA (9th ed.)

Chun-Yao Wang. "Automatic Interconnection Rectification for SoC Design Verification Based on the Port Order Fault Model." IEEE Transactions on Computer-aided Design of Integrated Circuits and Systems, .