Chun-Yao Wang. Automatic interconnection rectification for SoC design verification based on the port order fault model. IEEE Transactions on computer-aided design of integrated circuits and systems.
Citace podle Chicago (17th ed.)Chun-Yao Wang. "Automatic Interconnection Rectification for SoC Design Verification Based on the Port Order Fault Model." IEEE Transactions on Computer-aided Design of Integrated Circuits and Systems .
Citace podle MLA (9th ed.)Chun-Yao Wang. "Automatic Interconnection Rectification for SoC Design Verification Based on the Port Order Fault Model." IEEE Transactions on Computer-aided Design of Integrated Circuits and Systems, .
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