Jaesik Lee. Chip-level charged-device modeling and simulation in CMOS integrated circuits. IEEE Transactions on computer-aided design of integrated circuits and systems.
芝加哥风格引文Jaesik Lee. "Chip-level Charged-device Modeling and Simulation in CMOS Integrated Circuits." IEEE Transactions on Computer-aided Design of Integrated Circuits and Systems .
MLA引文Jaesik Lee. "Chip-level Charged-device Modeling and Simulation in CMOS Integrated Circuits." IEEE Transactions on Computer-aided Design of Integrated Circuits and Systems, .
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