APA aipamena

Jaesik Lee. Chip-level charged-device modeling and simulation in CMOS integrated circuits. IEEE Transactions on computer-aided design of integrated circuits and systems.

Chicago Style aipamena

Jaesik Lee. "Chip-level Charged-device Modeling and Simulation in CMOS Integrated Circuits." IEEE Transactions on Computer-aided Design of Integrated Circuits and Systems .

MLA aipamena

Jaesik Lee. "Chip-level Charged-device Modeling and Simulation in CMOS Integrated Circuits." IEEE Transactions on Computer-aided Design of Integrated Circuits and Systems, .