Fast on-chip inductance simulation using a precorrected-FFT method.

Fast on-chip inductance simulation using a precorrected-FFT method.

In this paper, a precorrected-fast-Fourier-transform (FFT) approach for fast and highly accurate simulation of circuits with on-chip inductance is proposed. This work is motivated by the fact that circuit analysis and optimization methods based on the partial element equivalent circuit model require...

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Bibliographic Details
Published in:IEEE Transactions on computer-aided design of integrated circuits and systems 22, 1 (2003).
Main Author: Hu, H.
Format: Article
Language:English
Subjects:
CPU time.
Discrete FFT.
Fast magnetic vector potential calculation.
Fast on-chip inductance simulation.
Grid representation.
Inductance calculation procedure.
Inductance matrix.
Large circuits.
Matrix-vector product.
Partial element equivalent circuit model.
Precorrected FFT method.
Precorrected fast Fourier transform.