Jong-Yeol Lee. Timed compiled-code functional simulation of embedded software for performance analysis of SOC design. IEEE Transactions on computer-aided design of integrated circuits and systems.
Chicago Style (17th ed.) CitationJong-Yeol Lee. "Timed Compiled-code Functional Simulation of Embedded Software for Performance Analysis of SOC Design." IEEE Transactions on Computer-aided Design of Integrated Circuits and Systems .
MLA (9th ed.) CitationJong-Yeol Lee. "Timed Compiled-code Functional Simulation of Embedded Software for Performance Analysis of SOC Design." IEEE Transactions on Computer-aided Design of Integrated Circuits and Systems, .
Warning: These citations may not always be 100% accurate.