00000cab a22000003a 4500 UP-99796217609500289 Buklod 20231007234344.0 m |o d | ta 101009s xx d | ||r ||||| || DENGII eng Chandra, A. A unified approach to reduce SOC test data volume, scan power and testing time. pp. 352-363 We present a test resource partitioning (TRP) technique that simultaneously reduces test data volume, test application time, and scan power. The proposed approach is based on the use of alternating run-length codes for test data compression. We present a formal analysis of the amount of data compression obtained using alternating run-length codes. We show that a careful mapping of the don't-cares in precomputed test sets to 1's and 0's leads to significant savings in peak and average power, without requiring either a slower scan clock or blocking logic in the scan cells. We present a rigorous analysis to show that the proposed TRP technique reduces testing time compared to a conventional scan-based scheme. We also improve upon prior work on run-length coding by showing that test sets that minimize switching activity during scan shifting can be more efficiently compressed using alternating run-length codes. Experimental results for the larger ISCAS89 benchmarks and an IBM production circuit show that reduced test data volume, test application time, and low power-scan testing can indeed be achieved in all cases. ATPG. SoC test. Alternating run-length codes. Embedded core testing. Formal analysis. Scan power reduction. Scan shifting. Scan testing. Switching activity. System-on-a-chip testing. Test application time reduction. Test data compression. Test data volume reduction. Test resource partitioning technique. Unified approach. IEEE Transactions on computer-aided design of integrated circuits and systems 22, 3 (2003). FO UPD DENG-II Article