Chandra, A. A unified approach to reduce SOC test data volume, scan power and testing time. IEEE Transactions on computer-aided design of integrated circuits and systems.
Citace podle Chicago (17th ed.)Chandra, A. "A Unified Approach to Reduce SOC Test Data Volume, Scan Power and Testing Time." IEEE Transactions on Computer-aided Design of Integrated Circuits and Systems .
Citace podle MLA (9th ed.)Chandra, A. "A Unified Approach to Reduce SOC Test Data Volume, Scan Power and Testing Time." IEEE Transactions on Computer-aided Design of Integrated Circuits and Systems, .
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