Chandra, A. A unified approach to reduce SOC test data volume, scan power and testing time. IEEE Transactions on computer-aided design of integrated circuits and systems.
Cita Chicago (17th ed.)Chandra, A. "A Unified Approach to Reduce SOC Test Data Volume, Scan Power and Testing Time." IEEE Transactions on Computer-aided Design of Integrated Circuits and Systems .
Cita MLA (9th ed.)Chandra, A. "A Unified Approach to Reduce SOC Test Data Volume, Scan Power and Testing Time." IEEE Transactions on Computer-aided Design of Integrated Circuits and Systems, .
Atenció: Aquestes cites poden no estar 100% correctes.