Chabini, N. Methods for minimizing dynamic power consumption in synchronous designs with multiple supply voltages. IEEE Transactions on computer-aided design of integrated circuits and systems.
Chicago Style (17th ed.) CitationChabini, N. "Methods for Minimizing Dynamic Power Consumption in Synchronous Designs with Multiple Supply Voltages." IEEE Transactions on Computer-aided Design of Integrated Circuits and Systems .
MLA引文Chabini, N. "Methods for Minimizing Dynamic Power Consumption in Synchronous Designs with Multiple Supply Voltages." IEEE Transactions on Computer-aided Design of Integrated Circuits and Systems, .
警告：這些引文格式不一定是100％准確.