Chabini, N. Methods for minimizing dynamic power consumption in synchronous designs with multiple supply voltages. IEEE Transactions on computer-aided design of integrated circuits and systems.
Chicago-Zitierstil (17. Ausg.)Chabini, N. "Methods for Minimizing Dynamic Power Consumption in Synchronous Designs with Multiple Supply Voltages." IEEE Transactions on Computer-aided Design of Integrated Circuits and Systems .
MLA-Zitierstil (9. Ausg.)Chabini, N. "Methods for Minimizing Dynamic Power Consumption in Synchronous Designs with Multiple Supply Voltages." IEEE Transactions on Computer-aided Design of Integrated Circuits and Systems, .
Achtung: Diese Zitate sind unter Umständen nicht zu 100% korrekt.