Chabini, N. Methods for minimizing dynamic power consumption in synchronous designs with multiple supply voltages. IEEE Transactions on computer-aided design of integrated circuits and systems.
Citace podle Chicago (17th ed.)Chabini, N. "Methods for Minimizing Dynamic Power Consumption in Synchronous Designs with Multiple Supply Voltages." IEEE Transactions on Computer-aided Design of Integrated Circuits and Systems .
Citace podle MLA (9th ed.)Chabini, N. "Methods for Minimizing Dynamic Power Consumption in Synchronous Designs with Multiple Supply Voltages." IEEE Transactions on Computer-aided Design of Integrated Circuits and Systems, .
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