00000cab a22000003a 4500 UP-99796217609500282 Buklod 20231007234344.0 m |o d | ta 101009s xx d | ||r ||||| || DENGII eng Heitzinger, C. Simulation of arsenic in situ doping with polysilicon CVD and its application to high aspect ratio trenches. pp. 285-292 Filling high aspect ratio trenches is an essential manufacturing step for state of the art memory cells. Understanding and simulating the transport and surface processes enables one to achieve voidless filling of deep trenches, to predict the resulting profiles, and thus to optimize the process parameters and the resulting memory cells. Experiments on arsenic doped polysilicon deposition show that under certain process conditions step coverages greater than unity can be achieved. We developed a new model for the simulation of arsenic doped polysilicon deposition, which takes into account surface coverage dependent sticking coefficients and surface coverage dependent arsenic incorporation and desorption rates. The additional introduction of Langmuir-Hinshelwood type time dependent surface coverage enabled the reproduction of the bottom up filling of the trenches in simulations. Additionally, the rigorous treatment of the time dependent surface coverage allows to trace the in situ doping of the deposited film. The model presented was implemented and simulations were carried out for different process parameters. Very good agreement with experimental data was achieved with theoretically deduced parameters. Simulation results are shown and discussed for polysilicon deposition into 0.1 μm wide and 7 μm deep, high aspect ratio trenches. 0.1 micron. 7 micron. As doped polysilicon deposition simulation. As in situ doping. Langmuir-Hinshelwood type time dependent surface coverage. Si:As. Bottom up filling. Deep trenches. High aspect ratio trenches. Manufacturing step. Memory cells. Model. Polysilicon CVD. Process parameters optimization. Profile prediction. Step coverages. Surface coverage dependent As desorption rates. Surface coverage dependent As incorporation rates. Surface coverage dependent sticking coefficients. Surface processes. Surface topography. Transport processes. Voidless filling. IEEE Transactions on computer-aided design of integrated circuits and systems 22, 3 (2003). FO UPD DENG-II Article