Near-optimal PLL design for decision-feedback carrier and timing recovery.

A new design method is presented for the design of PLL loop filters for carrier recovery, bit timing, or other synchronization loops given the phase noise spectrum and noise level. Unlike the conventional designs, our design incorporates a possible large decision delay and S-curve slope uncertainty....

Täydet tiedot

Bibliografiset tiedot
Julkaisussa:IEEE Transactions on communications 49, 9 (2001).
Päätekijä: Yaniv, O.
Aineistotyyppi: Artikkeli
Kieli:English
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