High-speed demonstration of a superconducting pseudo-random bit-sequence generator.

High-speed demonstration of a superconducting pseudo-random bit-sequence generator.

This paper describes the design, analysis and test results for a 4-bit pseudo-random bit-sequence generator (PRBSG) implemented with complementary output switching logic (COSL) gates. The PRBSG was optimized using a Monte Carlo simulation method for 10-GHz operation. The circuit has been fabricated...

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Bibliographic Details
Published in:IEEE Transactions on applied superconductivity 10, 2 (2000).
Main Author: Wang, Z.
Format: Article
Language:English
Subjects:
0.15 W.
2 to 10 GHz.
4 bit.
Monte Carlo simulation.
Nb.
Complementary output switching logic gate.
Critical current density.
High-speed circuit.
Niobium technology.
Sheet resistance.
Superconducting pseudo-random bit-sequence generator.