Modeling the wiring of deep submicron ICs.

Modeling the wiring of deep submicron ICs.

The semiconductor industry has fuelled the enormous growth of the electronics industry with an unending flow of even better, faster, cheaper chips. These chip improvements, in turn, have been stoked by steady progress in semiconductor process technology, which, as Moore's law predicts, doubles...

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Bibliographic Details
Published in:IEEE spectrum 37, 3 (2000).
Main Author: Walker, M.G
Format: Article
Language:English
Subjects:
Chip performance.
Deep submicron IC.
Interconnect.
Interconnect performance.
Logic design.
Logic synthesis engines.
Post-layout timing values.
Pre-layout timing values.
Timing.
Wiring modeling.