Noda, H. The Design and Implementation of the Massively Parallel Processor Based on the Matrix Architecture. IEEE Journal of solid state circuits.
Chicago-Zitierstil (17. Ausg.)Noda, H. "The Design and Implementation of the Massively Parallel Processor Based on the Matrix Architecture." IEEE Journal of Solid State Circuits .
MLA-Zitierstil (9. Ausg.)Noda, H. "The Design and Implementation of the Massively Parallel Processor Based on the Matrix Architecture." IEEE Journal of Solid State Circuits, .
Achtung: Diese Zitate sind unter Umständen nicht zu 100% korrekt.