A 160K Gates

A 160K Gates

In this paper, a low-cost H.264/AVC video decoder design is presented for high definition television (HDTV) applications. Through optimization from algorithmic and architectural perspectives, the proposed design can achieve real-time H.264 video decoding on HD1080 video (1920 times 1088@30 Hz) when...

Disgrifiad llawn

Manylion Llyfryddiaeth
Cyhoeddwyd yn:IEEE Journal of solid state circuits 42, 1 (2007).
Prif Awdur: Lin, C.-C
Fformat: Erthygl
Iaith:English
Pynciau:
0.18 micron.
120 MHz.
320 mW.
4.5 kBytes.
CMOS technology.
H.264/AVC video decoder design.
HDTV.
SRAM.
Si.
High definition television.
Low power consumption.
Low-cost design.
Real-time H.264 video decoding.