Iizuka, K. A 14-bit digitally self-calibrated pipelined ADC with adaptive bias optimization for arbitrary speeds up to 40 MS. IEEE Journal of solid state circuits.
Citace podle Chicago (17th ed.)Iizuka, K. "A 14-bit Digitally Self-calibrated Pipelined ADC with Adaptive Bias Optimization for Arbitrary Speeds Up to 40 MS." IEEE Journal of Solid State Circuits .
Citace podle MLA (9th ed.)Iizuka, K. "A 14-bit Digitally Self-calibrated Pipelined ADC with Adaptive Bias Optimization for Arbitrary Speeds Up to 40 MS." IEEE Journal of Solid State Circuits, .
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