Iizuka, K. A 14-bit digitally self-calibrated pipelined ADC with adaptive bias optimization for arbitrary speeds up to 40 MS. IEEE Journal of solid state circuits.
Chicago Style (17th ed.) CitationIizuka, K. "A 14-bit Digitally Self-calibrated Pipelined ADC with Adaptive Bias Optimization for Arbitrary Speeds Up to 40 MS." IEEE Journal of Solid State Circuits .
MLA (9th ed.) CitationIizuka, K. "A 14-bit Digitally Self-calibrated Pipelined ADC with Adaptive Bias Optimization for Arbitrary Speeds Up to 40 MS." IEEE Journal of Solid State Circuits, .
Warning: These citations may not always be 100% accurate.